This chapter provides information about the M262 processing performance.
This table presents logic processing performance for various logical instructions:
IL Instruction Type |
Duration for 1000 Instructions (μs) |
|
---|---|---|
TM262L10MESE8T TM262M15MESS8T |
TM262L20MESE8T TM262M25MESS8T TM262M35MESS8T |
|
Addition/subtraction/multiplication of INT |
5 |
3 |
Addition/subtraction/multiplication of DINT |
5 |
3 |
Addition/subtraction of REAL |
11 |
6 |
Multiplication of REAL |
14 |
7 |
Division of REAL |
39 |
20 |
Operation on BOOLEAN, for example, Status:= Status and value |
12 |
6 |
LD INT + ST INT |
6 |
3 |
LD DINT + ST DINT |
6 |
3 |
LD REAL + ST REAL |
6 |
3 |
Retain and Retain-Persistent Performance
The retain and retain-persistent variables are saved in a dedicated memory, see NVRAM Memory Organization. Each read/write access to these variables, impacts the cycle time.
This table presents the performance impact of retain and retain-persistent variables on cycle time during POU execution:
IL Instruction Type |
Duration for 1000 variables (μs) |
|
---|---|---|
TM262L10MESE8T TM262M15MESS8T |
TM262L20MESE8T TM262M25MESS8T TM262M35MESS8T |
|
READ 1000 INT |
434 |
377 |
WRITE 1000 INT |
418 |
359 |
READ 1000 BYTE |
434 |
377 |
WRITE 1000 BYTE |
419 |
359 |
READ1000 DINT |
662 |
685 |
WRITE 1000 DINT |
699 |
539 |
Communication and System Processing Time
The communication processing time varies, depending on the number of requests sent and received.
The response time presented in the following table represents the time between a signal rising edge on an input triggering an external task and the edge of an output set by this task:
Minimum |
Typical |
Maximum |
---|---|---|
60 μs |
80 μs |
100 μs |