This register specifies the maximum number of Input MTU blocks sent without acknowledgment from the module to the superordinate system.
Basic Procedure with Default Setting = 1 (No Forwarding)
If the module considers a received frame as complete (frame size reached, frame end identifier set, and so on), the data exchange is acknowledged using the InputSequence, and the Input MTU block (RxBytes) is filled with the first frame data. These data are considered as pending until the superordinate system reads the frame data and acknowledges the transfer with the OutputSequence. Only then can the module create new frame data and a new InputSequence in the Input MTU block. The sequence is then repeated.
To better utilize the transfer bandwidth, the module can be configured to issue up to seven Input MTU blocks in a row to the bus without waiting for intermediate acknowledgments. A strict requirement is that each sequence is read and evaluated by the superordinate system, otherwise a correct sequence of data transfer and sequence acknowledgment is not possible. This can be achieved by using identical cycle times or a Block Forward Delay.
The basic structure of the data transfer and sequence acknowledgment is identical and must be maintained; otherwise an error state occurs.
This setting only refers to the receiving direction of the module. In the sending direction (to the module), the application controls the behavior using control bytes. The module supports all options.
