In this register, the error states of the analog outputs are represented. The error states are latched upon their occurrence and continue to be pending until acknowledgement.
Unacknowledged detected errors do not affect functioning.
|
Bit |
Description |
|---|---|
|
0 |
0 = No error analog output 01 1 = Error state validation time exceeded analog output 01 |
|
1 |
0 = No error analog output 02 1 = Error state validation time exceeded analog output 02 |
|
2–7 |
0 |